Current commercial systems-on-chips (SoC) integrate an increasingly large number of predesigned cores and their number is predicted to increase significantly in the near future. In order to scale future many core chips to hundreds or even thousands of cores, new and sophisticated interconnect technologies will be essential in enabling low-latency communication and efficient cache utilization. The existing methods of implementing Network on Chip(NoC) with planar metal wire interconnects is deficient due to high latency and significant power consumption and is not scalable to future processors.

The research team at Drexel, has now developed an innovative wireless interconnect technology using Thru Silicon Via(TSV) based antennas as on-chip antennas for a scalable, cost-efficient, flexible and reusable on chip communication platform. The research is still on-going, but it has been demonstrated that it can operate long-distances(upto 30mm) and can be optimized to support multiple channels without needing line-of-sight. In addition, due to the extensive research that has already been done on TSV’s for 3D IC’s, the technology can be easily integrated onto existing chip multicore processors. With the easy adaptability, low latency and high throughput, TSV antennas enable a complete wireless network on-chip architecture or a hybrid scheme where wires accommodate local traffic like in a city and TSV’s act like superhighways, connecting distant points on chip.