ACCELERATED FAILURE TEST OF COUPLED DEVICE STRUCTURES UNDER DIRECT CURRENT BIAS

Overview

A method of conducting an in situ reliability test on a cross-section of a device with layered structure at micron-scale and at least two electrodes. The method includes steps of locating an electron transparent cross-sectional portion of the device in a holder and transmitting a direct current bias voltage to the cross-sectional portion of the device through at least two electrodes of the device, and observing and quantifying the microstructural changes of the device cross-section on the holder. A system for conducting an in situ reliability test on a device with a layered structure at a micron-scale and at least two electrodes is also provided.

Intellectual Property and Development Status

United States Patent Pending- 15/087,187

Commercialization Opportunities

 

Contact Information

 

For Intellectual Property and Licensing Information:

Elizabeth Poppert, Ph.D.

Licensing Manager

Office of Technology Commercialization

The Left Bank

3180 Chestnut Street, Suite 104

Philadelphia, PA 19104

Phone: 1-215-895-0999

Email: lizpoppert@drexel.edu

 

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